Alternative Implementations of Two Level Adaptive Branch Prediction

As the issue rate and depth of pipelining of high performance Superscalar processors increase, the importance of an excellent b r a n c h predictor becomes more vital to delivering the potential performance of a wide-issue, deep pipelined microarchitecture. We propose a new dynamic branch predictor (Two-Level Adaptive Branch Prediction) that achieves substantially higher accuracy than any other scheme reported in the literature. The mechanism uses two l e v els of branch history information to make predictions, the history of the last k branches encountered, and the branch b e h a vior for the last s occurrences of the speciic pattern of these k branches. We have identiied three variations of the Two-Level Adap-tive Branch Prediction, depending on how nely we r e-solve the history information gathered. We compute the hardware costs of implementing each of the three variations , and use these costs in evaluating their relative e f-fectiveness. We measure the branch prediction accuracy of the three variations of Two-Level Adaptive Branch Prediction, along with several other popular proposed dynamic and static prediction schemes, on the SPEC benchmarks. We s h o w t h a t t h e a verage prediction accuracy for Two-Level Adaptive Branch Prediction is 97 percent, while the other known schemes achieve at most 94.4 percent a verage prediction accuracy. W e measure the eeectiveness of diierent prediction algorithms and diierent amounts of history and pattern information. We measure the costs of each v ariation to obtain the same prediction accuracy.